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Logic Synthesis and Verification, Hardcover by Hassoun, Soha (EDT); Sasao, Ts...

Description: Logic Synthesis and Verification, Hardcover by Hassoun, Soha (EDT); Sasao, Tsutomu (EDT); Brayton, Robert K. (EDT), ISBN 0792376064, ISBN-13 9780792376064, Brand New, Free shipping in the US Research and development of logic synthesis and verification have matured considerably over the past two decades. Many commercial products are available, and they have been critical in harnessing advances in fabrication technology to produce today's plethora of electronic components. While this maturity is assuring, the advances in fabrication continue to seemingly present unwieldy challenges. Logic Synthesis and Verification provides a state-of-the-art view of logic synthesis and verification. It consists of fifteen chapters, each focusing on a distinct aspect. Each chapter presents key developments, outlines future challenges, and lists essential references. Two unique features of this book are technical strength and comprehensiveness. Th chapters are written by twenty-eight recognized leaders in the field and reviewed by equally qualified experts. The topics collectively span the field. Logic Synthesis and Verification fills a current gap in the existing CAD literature. Each chapter contains essential information to study a topic at a great depth, and to understand further developments in the field. Th is intended for seniors, graduate students, researchers, and developers of related Computer-Aided Design (CAD) tools. From the foreword: "The commercial success of logic synthesis and verification is due in large part to the ideas of many of the authors of this book. Their innovative work contributed to design automation tools that permanently changed the course of electronic design." by Aart J. de Geus, Chairman and CEO, Synopsys, Inc.

Price: 188.12 USD

Location: Jessup, Maryland

End Time: 2024-12-29T11:07:24.000Z

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Logic Synthesis and Verification, Hardcover by Hassoun, Soha (EDT); Sasao, Ts...

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Book Title: Logic Synthesis and Verification

Number of Pages: Xv, 454 Pages

Publication Name: Logic Synthesis and Verification

Language: English

Publisher: Springer

Subject: Electronics / Circuits / Logic, Computer Science, Cad-Cam, Electronics / Circuits / General, Logic Design

Publication Year: 2001

Item Weight: 64.9 Oz

Type: Textbook

Subject Area: Computers, Technology & Engineering

Author: Tsutomu Sasao

Item Length: 9.3 in

Series: The Springer International Series in Engineering and Computer Science Ser.

Item Width: 6.1 in

Format: Hardcover

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